Discussion in 'Electronics Forum' started by Guest, May 22, 2007.
what is difference between inertial and transportation time
Inertial and Transport Delays & the Event Queue in Verilog
Inertial Delay models depict real hardware and any change in input value is propagated to the output only if the change is stable for a duration greater than the propagation delay of the model. An inertially delayed signal assignment involves looking at pending transactions when adding a new transaction.
All transactions scheduled for a time equal to or later than the current transaction (t1) are deleted as in transport delay model. If the pulse rejection time is tr, any pending transactions between t1-tr and tr driving the current transaction value are retained and all other transactions are removed.
Scheduling and assigning signal values largely depends on the delay mechanism used. Transport Delay models are ideal and any change in the input is propagated to the output, no matter how small the duration of the change. Any pending transactions on a driver that are scheduled for a time late than or equal to the new transaction are deleted.
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