Wanted Fresh Talented Engineering Graduates @ Bangalore.

Discussion in 'Technical Jobs' started by Guest, May 20, 2009.

  1. Guest

    Guest Guest

    Wanted Fresh Talented Engineering Graduates @ Bangalore.

    We are looking to Appoint Fresh Talented Engineering Graudats at Bangalore to work on Embedded Technologies. Applicants must be B.E /B Tech /M Tech /MSc /MCA(E&C,EEE,CS,E&T,IT) with 60% Agg. 2009, 2008 and 2007 passout are eligible. Selected Candidates will be trained to join companies immediately. Training is on Self-Support basis.

    Salary Minimum 1.8 to 2.5 lac p.a

    Contact:
    Phone:- 080- 25633893, 25630776.
  2. Guest

    Guest Guest

    Resume Forward

    RESUME


    Professional Objective: To utilize my skills and abilities in the field that offers professional growth while being resourceful, innovative and flexible.



    KIRAN KUMAR R. SHETTY,

    Qualification
    B.E., Electrical & Electronics
    Engineering.



    E-mail :
    kr.shetty@tcs.com


    Address :
    “RaviKiran” House,
    P.O.Palli,
    Karkala Taluk,Udupi Dist.,
    Karnataka State-574244,
    India.



    Contact:
    Mobile: +91-9291584045


    Strengths :

    Readiness to take up responsibilities.

    Perseverance.








    Resources

    • Good interpersonal skill.
    • Good communication skill.
    • Quick adaptability to new technologies.
    • Effective leadership Qualities.
    • Highly energetic to cooperate as a team player.

    Academic Chronicle

    B.E, Electrical and Electronics Engineering.
    College:NMAMIT,NITTE,
    Karkala Taluk,Udupi Dist.,Karnataka State.
    University : VTU,Belgaum.
    Percentage : 71.25% (May 2008)


    College
    St.Mary’s Pre-University College,
    Shirva,Udupi Dist.,
    Karnataka.
    Percentage :82.93 % (April 2004).
    PCM:90%
    PCB:91%


    SSLC
    School : St.Lawrance Junior College,
    Moodubelle,Udupi Dist.,
    Karnataka.
    Percentage : 82.56% (April 2002).


    Computer Skills

    Languages : C ,JAVA/J2EE,SQL
    Operating System : Windows98/2000/ XP
    Packages : MS-office,MS-Powerpoint

    Areas of interest :

    Electrical machines.
    Power electronics.
    Logic Design.
    Control Systems
    Linear integrated circuits.
    VLSI.







    Personal Epitome

    Father’s Name : K. Radhakrishna Shetty

    Date of Birth : 30th Dec 1986.

    Age : 22 Years.

    Sex : Male.

    Nationality : Indian.

    Marital Status : Single.


    Languages known

    English,Kannada,Tulu & Hindi

    (Read, Write & Speak).


    Hobbies:
    Stamp & Coin Collection.
    Listening to music.
    Watching sports channels.
    Playing Cricket,Volleyball & Table Tennis.

    Work History:
    Assistant System Engineer-Trainee,TCS Hyderabad (still working).



    Extra-Curricular Activities

    • Mini Projects in Electronics.
    • NCC Cadet.
    • Active Member of ELITES, E & E Branch Association,NMAMIT,Nitte
    • Class Representative of E & E Branch Association,NMAMIT,Nitte for the year 2006-2007.




    In plant Training

    • Industrial Training in Karnataka Power Transmission Corporation Limited, Karkala (220K.V.) during the year August-2006.
    • FEEL Employable training course(GD & HR) conducted by VAYAVYA labs, Manglore.
    FEEL Employable training course conducted by CLHRD,AIM INSIGHTS, Manglore

    Curriculum Project:

    Project Title : Ultrasonic Range Finder Using PIC Microcontroller.
    Duration : 4 Months.
    Team Size : 4 members.

    Personal Traits
    As I believe hard work is the key to success and character to personality. I always keep proactive, Industrious and Good natured.

    DECLARATION

    I hereby declare that the above-mentioned details are true to the best of my knowledge.


    Yours faithfully Place: Hyderabad

    Date:
    (KIRAN KUMAR R. SHETTY)
  3. Guest

    Guest Guest

    Resume

    EDUCATION

    Masters of Science: Electrical Engineering, December 2007
    University of Missouri – Kansas City, USA G.P.A: 3.8/4.0

    Bachelors of Technology: Electronics and Communication Engineering, April 2006
    St.Martin’s Engg College, Kompally, Affiliated to JNTU, India Percentage: 70.13

    SKILLS
    Circuit Design Tools: Cadence Design Systems (Analog Artist Schematic Entry, Virtuoso, Virtuoso XL, DRC, LVS, Spectre, SpectreRF, Hspice, Cosmos), LeonardoSpectrum Synthesis Tool, ModelSim, Xilinx, QuestaSim

    Programming Languages: Verilog, VHDL, PERL, C, Sql, Embedded C, System verilog

    Software and Testing Tools: Pspice, KEIL, Quality Center

    Office Applications: Ms Word, Ms Excel, Ms PowerPoint

    COURSE WORK

    Analog Integrated Circuit Design
    Wireless Networks
    VLSI System Design
    Advanced Design of Electronic Devices
    Verilog
    Electronic Circuit Design
    Antennas and Wave Propagation
    Embedded Systems
    Network Architecture I

    RESEARCH/ PROJECT WORK


    ANALOG CIRCUIT DESIGN Fall 2007

    Design of CMOS Folded Cascode Opamp using Cadence Suite.

    Implemented in 0.6 um technology with a gain of 83 db, unity gain bandwidth of 8.26MHZ, slew rate 20 v/us and phase margin of 450. Design included the following tasks: pencil and paper analysis, pre and post layout simulation, DRC/LVS and circuit extracting. Layout includes common centroid matching, guarding and shield techniques
    • Designed and implemented a three stage operational amplifier using folded cascode structure.
    • Powered the amplifier from a 3.3 volts power supply and with a current reference of 10uA.
    • Used BSIMv3 AMI06 0.6u process technology.
    • Captured the schematic using cadence’s schematic composer.
    • Generated the symbol for the schematic using cadence’s composer symbol editor.
    • Performed transistor level simulation using HSPICE through cadence’ s Analog artist environment.
    • Layout was drawn step by step according to the schematic.
    • Frequently used design rule checker (DRC) to detect any design rule violations during and after the mask layout design.
    • Identified the individual transistors and their interconnections, as well as the parasite resistances using circuit extractor.
    • Layout-Verses-Schematic (LVS) check was performed to guarantee topological match.
    • Fabricated with a target AMIS0.5 (C5) n-well process.

    DIGITAL CIRCUIT DESIGN Spring 2007

    Design of 16-bit Universal shift register using Cadence Suite
    A 16-bit universal shift register was developed with universal gates NAND/NOR gates to reduce the propagation delay, power consumption and gate density. Design includes the pre and post layout simulation; DRC/LVS, extract and GDS file generation in 0.6um technology.
    • Designed a 16-Bit Universal shift register to perform shift right, shift left, parallel load and other operations in 0.6um CMOS technology.
    • Verified the operation by simulating the functionality of the register.
    • Generated the final layout according to the schematic.

    VERILOG Fall 2006\
    Implementation of DLX processor using Verilog HDL using ModelSim and LeonardoSpectrum 2000.1b.

    The DLX processor was implemented on the verilog HDL using ModelSim and various instructions of the ALU such as add, subtract, shift left and shift right operations were performed and finally the behavioral code is synthesized to get the block level diagram using LeonardoSpectrum 2000.1b synthesis tool
    • Wrote behavioral code describing the functionality of the DLX processor.
    • Obtained the block diagram of the DLX processor from the behavioral code.


    EMBEDDED REAL TIME SYSTEM (Under Graduate) Sping 2006

    Implementation of CAN Protocol in LPC 2129 micro controller using KEIL
    The LPC 2129 is based in ARMTDMI core. This is a 32-bit RISC controller with ARM and THUMB instruction set. Some of the main features of this controller are internal 128kb Flash ROM, 16kb RAM and 56 general purpose IOs. Apart from many other serial ports this chip has two CAN channels

    • Implemented and developed the Application Layer in CAN Network for Industrial Automation.
    • Controlled the temperature of a heater using LPC 2000 series micro controller, LPC 2129.
    • Designed and wrote EMBEDDED C program to control and maintain the temperature.
    • Analyzed the temperature on PC through serial port (RS 232).
    • Wrote assembly language program to control Liquid Crystal Display.



    ACTIVITIES
    • Member of Eta Kappa Nu (HKN), the Electrical and Computer Engineering Honor Society
    • Recipient of ‘chancellor’s Non Resident student award’ from UMKC
    • Presented National level Technical paper on Smart Antennas

    TERLI, SASHI BHUSHANA NAIDU
    Ph:09966415417

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